Elpida Corporation of Japan announced today that it has successfully developed a 2GB-capacity DDR3 SDRAM memory chip using a 30nm process, and its core area and power consumption have set new records in the industry.
The memory chips are manufactured using a 30-nm process and are currently the world's smallest 2GB DDR3 chips. The throughput of each wafer can be increased by 45% compared to 40nm process products, which greatly increases cost competitiveness.
The particle supports DDR3-1866 frequency up to 1600MHz at a low voltage of 1.35V. At the same time, its operating current is also the lowest in the industry, compared with the same factory 40nm product operating current decreased by 15%, standby current decreased by 10%.
Elpida will mass-produce 2GB DDR3 particles in this 30nm process in December of this year. In the future, it will introduce 30nm process into Mobile RAM and other product lines, and join TSV silicon perforation technology to provide single-chip memory for mobile digital cameras and other products. Program.
Stator and rotor laminations are an important part of motors and generators. For medium-sized laminations with a great quantity, we usually use compound puncing. The advantages of compound punching is the process is suitable for mass production of medium-sized stator and rotor laminations. And the lead time is shorter. Usually the outer diameter is from 300mm-580mm.
Stator And Rotor Lamination By Compound Punching,Laminated Stator,Core Stator,Motor Laminations
Henan Yongrong Power Co., Ltd , https://www.hnyongrongglobal.com